Education:

Ph.D. in Computer Science, State University of New York at Stony Brook, 2007
M.S. in Computer Science, State University of New York at Stony Brook, 2004
M.S. in Computer Science, Xi’an Jiaotong University, China, 2002
B.S. in Computer Science, Xi’an Jiaotong University, China, 1999

Research Areas:

High performance routers and switches
High speed networking
Quality of service
Network processors
Network security


Selected Publications:

D. Pan and Y. Yang, ``Max-min fair bandwidth allocation algorithms for packet
    switches,’’ IEEE International Parallel and Distributed Processing Symposium
    (IPDPS 2007), Long Beach, CA, Mar. 2007.

D. Pan and Y. Yang, ``Localized asynchronous packet scheduling for buffered
    crossbar switches,’’ ACM/IEEE Symposium on Architectures for Networking and
    Communications Systems (ANCS 2006), San Jose, CA, Dec. 2006.

D. Pan and Y. Yang, ``Buffer management for lossless service in network
    processors,’’ IEEE Symposium on High Performance Interconnects (HOTI 2006),
    Palo Alto, CA, Aug. 2006.

D. Pan and Y. Yang, ``FIFO based multicast scheduling algorithm for virtual output
    queued packet switches,’’ IEEE Transactions on Computers, vol. 54, no. 10, pp.
    1283-1297, Oct. 2005.

D. Pan and Y. Yang, ``Pipelined two step iterative matching algorithms for CIOQ
    crossbar switches,’’ ACM/IEEE Symposium on Architectures for Networking and
    Communications Systems (ANCS 2005), Princeton, NJ, Oct. 2005.

  D. Pan and Y. Yang, ``Credit based fair scheduling for packet switched networks,’’
     IEEE Conference on Computer Communications (INFOCOM 2005), Miami, FL, Mar.
     2005.